This paper proposes a novel method, referred to as double-NAND expansion, to implement polynomials with all positive coefficients using unipolar stochastic logic. The proposed double-NAND expansion leads to implementations of polynomials using no more than 2n NAND gates where n represents the degree of the polynomial. The proposed implementations are compared with those based on multiplexers, Bernstein polynomial method, finite state machine method and factorization. The paper also considers implementations of several functions expressed as polynomials using truncated Mclaurin series based on the proposed approach. The experimental results show that the proposed method outperforms the prior methods in terms of accuracy, hardware complexity, and critical path.
|Original language||English (US)|
|Title of host publication||GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017|
|Publisher||Association for Computing Machinery|
|Number of pages||4|
|State||Published - May 10 2017|
|Event||27th Great Lakes Symposium on VLSI, GLSVLSI 2017 - Banff, Canada|
Duration: May 10 2017 → May 12 2017
|Name||Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI|
|Other||27th Great Lakes Symposium on VLSI, GLSVLSI 2017|
|Period||5/10/17 → 5/12/17|
Bibliographical noteFunding Information:
This research is supported by the National Science Foundation Grants CCF-1423407 and CCF-1319107.
- Double-NAND expansion
- Stochastic logic