Abstract
This paper addresses computing complex functions using unipolar stochastic logic. Stochastic computing requires simple logic gates and is inherently fault-tolerant. Thus, these structures are well suited for nanoscale CMOS technologies. Implementations of complex functions cost extremely low hardware complexity compared to traditional two's complement implementation. In this paper an approach based on polynomial factorization is proposed to compute functions in unipolar stochastic logic. In this approach, functions are expressed using polynomials, which are derived from Taylor expansion or Lagrange interpolation. Polynomials are implemented in stochastic logic by using factorization. Experimental results in terms of accuracy and hardware complexity are presented to compare the proposed designs of complex functions with previous implementations using Bernstein polynomials.
| Original language | English (US) |
|---|---|
| Title of host publication | GLSVLSI 2016 - Proceedings of the 2016 ACM Great Lakes Symposium on VLSI |
| Publisher | Association for Computing Machinery |
| Pages | 109-112 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781450342742 |
| DOIs | |
| State | Published - May 18 2016 |
| Event | 26th ACM Great Lakes Symposium on VLSI, GLSVLSI 2016 - Boston, United States Duration: May 18 2016 → May 20 2016 |
Publication series
| Name | Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI |
|---|---|
| Volume | 18-20-May-2016 |
Other
| Other | 26th ACM Great Lakes Symposium on VLSI, GLSVLSI 2016 |
|---|---|
| Country/Territory | United States |
| City | Boston |
| Period | 5/18/16 → 5/20/16 |
Bibliographical note
Publisher Copyright:© 2016 ACM.
Keywords
- Complex functions
- Polynomial factorization
- Stochastic division
- Stochastic logic
- Stochastic subtraction
- Unipolar representation