Value prediction has been suggested as a way to increase the instruction-level parallelism available in a superscalar processor. One of the potential difficulties in cost-effectively predicting values for a given instruction, however, is selecting the proper type of predictor. We propose a compiler-directed classification scheme that statically partitions instructions in a program into several groups, each of which is associated with a specific value predictability pattern. This value predictability pattern is encoded into the instructions to identify the type of value predictor that will be best suited for each instruction at run-time. Both an idealized profile-based compiler implementation and an implementation based on the GCC compiler are studied. We use execution-driven simulation and SPEC95 and SPEC2000 benchmarks to study the performance of this approach. This work also demonstrates the connection between value locality and source-level program structures thereby leading to a deeper understanding of the causes of this behavior.
|Original language||English (US)|
|Number of pages||9|
|Journal||Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors|
|State||Published - Jan 1 2001|