Comments on Low-energy CSMT carry generators and binary adders

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Abstract

In the above-naed article [ibid., vol. 7, no. 4, pp. 450¿462, Dec. 1999], the author has presented a multiplexer-based carry-select modified tree (CSMT) adder design. It was correctly pointed out in Section VI that these multiplexer-based adders are not just limited to redundant-to-binary-conversion- based adders, but can also be used in the context of carry-save binary adders. However, the carry-update recursion, based on p and g signals, given by [1, eq. (9)] cannot be used to exploit the CSMT adder principles in the above-named article. Here p and g, respectively, represent carry-propagate and carry-generate signals. This letter presents the correct carry-update recursion.

Original languageEnglish (US)
Article number6175991
Number of pages1
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume21
Issue number4
DOIs
StatePublished - Apr 4 2013

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Comments on Low-energy CSMT carry generators and binary adders. / Parhi, Keshab K.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 21, No. 4, 6175991, 04.04.2013.

Research output: Contribution to journalReview article

@article{33d73506ecfd4ee5b59118f53d6a7d73,
title = "Comments on Low-energy CSMT carry generators and binary adders",
abstract = "In the above-naed article [ibid., vol. 7, no. 4, pp. 450¿462, Dec. 1999], the author has presented a multiplexer-based carry-select modified tree (CSMT) adder design. It was correctly pointed out in Section VI that these multiplexer-based adders are not just limited to redundant-to-binary-conversion- based adders, but can also be used in the context of carry-save binary adders. However, the carry-update recursion, based on p and g signals, given by [1, eq. (9)] cannot be used to exploit the CSMT adder principles in the above-named article. Here p and g, respectively, represent carry-propagate and carry-generate signals. This letter presents the correct carry-update recursion.",
author = "Parhi, {Keshab K}",
year = "2013",
month = "4",
day = "4",
doi = "10.1109/TVLSI.2012.2190771",
language = "English (US)",
volume = "21",
journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
issn = "1063-8210",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "4",

}

TY - JOUR

T1 - Comments on Low-energy CSMT carry generators and binary adders

AU - Parhi, Keshab K

PY - 2013/4/4

Y1 - 2013/4/4

N2 - In the above-naed article [ibid., vol. 7, no. 4, pp. 450¿462, Dec. 1999], the author has presented a multiplexer-based carry-select modified tree (CSMT) adder design. It was correctly pointed out in Section VI that these multiplexer-based adders are not just limited to redundant-to-binary-conversion- based adders, but can also be used in the context of carry-save binary adders. However, the carry-update recursion, based on p and g signals, given by [1, eq. (9)] cannot be used to exploit the CSMT adder principles in the above-named article. Here p and g, respectively, represent carry-propagate and carry-generate signals. This letter presents the correct carry-update recursion.

AB - In the above-naed article [ibid., vol. 7, no. 4, pp. 450¿462, Dec. 1999], the author has presented a multiplexer-based carry-select modified tree (CSMT) adder design. It was correctly pointed out in Section VI that these multiplexer-based adders are not just limited to redundant-to-binary-conversion- based adders, but can also be used in the context of carry-save binary adders. However, the carry-update recursion, based on p and g signals, given by [1, eq. (9)] cannot be used to exploit the CSMT adder principles in the above-named article. Here p and g, respectively, represent carry-propagate and carry-generate signals. This letter presents the correct carry-update recursion.

UR - http://www.scopus.com/inward/record.url?scp=84875575822&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84875575822&partnerID=8YFLogxK

U2 - 10.1109/TVLSI.2012.2190771

DO - 10.1109/TVLSI.2012.2190771

M3 - Review article

AN - SCOPUS:84875575822

VL - 21

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SN - 1063-8210

IS - 4

M1 - 6175991

ER -