CMOS switched-opamp based sample-and-hold circuit

Liang Dai, Ramesh Harjani

Research output: Contribution to journalConference article

1 Scopus citations

Abstract

This paper presents a sample-and-hold design that is based on a switched-opamp. By using a switched-opamp topology charge injection errors are greatly reduced by turning off the transistors in saturation instead of triode region. A pseudo-differential topology is used to cancel the remaining signal independent clock feedthrough error. Switched opamps with differential pairs in both weak inversion and strong inversion are designed. Detailed simulation and measurement results of a switched-opamp based sample and hold circuit is used to show its performance superiority over traditional switched capacitor topologies.

Original languageEnglish (US)
Pages (from-to)476-479
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
StatePublished - Jan 1 1998
EventProceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA
Duration: May 31 1998Jun 3 1998

Fingerprint Dive into the research topics of 'CMOS switched-opamp based sample-and-hold circuit'. Together they form a unique fingerprint.

  • Cite this