Abstract
M-of-N threshold gates with hysteresis form a class of circuit elements that have important application in NULL Convention LogicTM, a novel asynchronous logic design methodology. General design guidelines for these M-of-N gates are presented using CMOS technology. Three types of circuit implementations are discussed: static, semi-static and dynamic. In addition, initialization techniques are presented for use in establishing a known initial state.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 61-64 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 2 |
| State | Published - Jan 1 1998 |
| Event | Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA Duration: May 31 1998 → Jun 3 1998 |