Circuit techniques for ultra-low power subthreshold SRAMs

Tae Hyoung Kim; Jason Liu; John Keane; Chris H. Kim

doi:10.1109/ISCAS.2008.4541982

Circuit techniques for ultra-low power subthreshold SRAMs

Tae Hyoung Kim, Jason Liu, John Keane, Chris H. Kim

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

23 Scopus citations

Abstract

Subthreshold operation has become an important area in applications where minimal power consumption and energy efficiency are the critical constraints. In particular, ultra-low power SRAM designs are critical for implementing such applications due to the large portion of the systems that they account for. However, sub-threshold SRAMs have many design issues such as cell stability, readability, and writability. In this paper, we give an overview of sub-threshold SRAM design issues and discuss several circuit techniques. We will focus on SRAM cell stability during read and write operation, improved writability, and read port circuits for the design of an ultra-low power sub-threshold SRAMs.

Original language	English (US)
Title of host publication	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages	2574-2577
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2008.4541982
State	Published - 2008
Event	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States Duration: May 18 2008 → May 21 2008

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Other

Other	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/Territory	United States
City	Seattle, WA
Period	5/18/08 → 5/21/08

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This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ISCAS.2008.4541982

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Kim, TH, Liu, J, Keane, J & Kim, CH 2008, Circuit techniques for ultra-low power subthreshold SRAMs. in 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008., 4541982, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 2574-2577, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, Seattle, WA, United States, 5/18/08. https://doi.org/10.1109/ISCAS.2008.4541982

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abstract = "Subthreshold operation has become an important area in applications where minimal power consumption and energy efficiency are the critical constraints. In particular, ultra-low power SRAM designs are critical for implementing such applications due to the large portion of the systems that they account for. However, sub-threshold SRAMs have many design issues such as cell stability, readability, and writability. In this paper, we give an overview of sub-threshold SRAM design issues and discuss several circuit techniques. We will focus on SRAM cell stability during read and write operation, improved writability, and read port circuits for the design of an ultra-low power sub-threshold SRAMs.",

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AU - Liu, Jason

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N2 - Subthreshold operation has become an important area in applications where minimal power consumption and energy efficiency are the critical constraints. In particular, ultra-low power SRAM designs are critical for implementing such applications due to the large portion of the systems that they account for. However, sub-threshold SRAMs have many design issues such as cell stability, readability, and writability. In this paper, we give an overview of sub-threshold SRAM design issues and discuss several circuit techniques. We will focus on SRAM cell stability during read and write operation, improved writability, and read port circuits for the design of an ultra-low power sub-threshold SRAMs.

AB - Subthreshold operation has become an important area in applications where minimal power consumption and energy efficiency are the critical constraints. In particular, ultra-low power SRAM designs are critical for implementing such applications due to the large portion of the systems that they account for. However, sub-threshold SRAMs have many design issues such as cell stability, readability, and writability. In this paper, we give an overview of sub-threshold SRAM design issues and discuss several circuit techniques. We will focus on SRAM cell stability during read and write operation, improved writability, and read port circuits for the design of an ultra-low power sub-threshold SRAMs.

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M3 - Conference contribution

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BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008

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ER -

Circuit techniques for ultra-low power subthreshold SRAMs

Abstract

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