This work showcases measured data corresponding to direct-current (DC) stress induced Electromigration (EM) phenomenon, characterized using on-chip circuits for interconnect test structures fabricated in a 16nm FinFET process. An array-based test vehicle featuring parallel stress and 4-wire Kelvin sensing capabilities is presented, employing wires with distinct feature sizes and metal stacks as the Devices-Under-Test (DUTs). Accelerated stress testing is achieved using on-chip using metal heaters positioned directly above the DUTs, which provides precise local temperature regulation in conjunction with fast cycling between stress and measurement temperatures. Test chip data captures several EM effects ranging from abrupt and/or progressive failures depending on DUT geometry, temporary healing effects, circuit-interconnect interplay, and process variation impacting EM lifetime.
|Original language||English (US)|
|Title of host publication||2019 IEEE International Electron Devices Meeting, IEDM 2019|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - Dec 2019|
|Event||65th Annual IEEE International Electron Devices Meeting, IEDM 2019 - San Francisco, United States|
Duration: Dec 7 2019 → Dec 11 2019
|Name||Technical Digest - International Electron Devices Meeting, IEDM|
|Conference||65th Annual IEEE International Electron Devices Meeting, IEDM 2019|
|Period||12/7/19 → 12/11/19|
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© 2019 IEEE.