Characterizing Electromigration Effects in a 16nm FinFET Process Using a Circuit Based Test Vehicle

N. Pande, C. Zhou, M. H. Lin, R. Fung, R. Wong, S. Wen, C. H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work showcases measured data corresponding to direct-current (DC) stress induced Electromigration (EM) phenomenon, characterized using on-chip circuits for interconnect test structures fabricated in a 16nm FinFET process. An array-based test vehicle featuring parallel stress and 4-wire Kelvin sensing capabilities is presented, employing wires with distinct feature sizes and metal stacks as the Devices-Under-Test (DUTs). Accelerated stress testing is achieved using on-chip using metal heaters positioned directly above the DUTs, which provides precise local temperature regulation in conjunction with fast cycling between stress and measurement temperatures. Test chip data captures several EM effects ranging from abrupt and/or progressive failures depending on DUT geometry, temporary healing effects, circuit-interconnect interplay, and process variation impacting EM lifetime.

Original languageEnglish (US)
Title of host publication2019 IEEE International Electron Devices Meeting, IEDM 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728140315
DOIs
StatePublished - Dec 2019
Event65th Annual IEEE International Electron Devices Meeting, IEDM 2019 - San Francisco, United States
Duration: Dec 7 2019Dec 11 2019

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume2019-December
ISSN (Print)0163-1918

Conference

Conference65th Annual IEEE International Electron Devices Meeting, IEDM 2019
CountryUnited States
CitySan Francisco
Period12/7/1912/11/19

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