Challenges in computer architecture evaluation

Kevin Skadron; Margaret Martonosi; David I. August; Mark D. Hill; David J. Lilja; Vijay S. Pai

doi:10.1109/MC.2003.1220579

Challenges in computer architecture evaluation

Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

75 Scopus citations

Abstract

In 2001, researchers met to discuss the experimental and evaluation problems that processor architecture research faces. The group agreed that current limitations and trends in evaluation techniques are troublesome and could noticeably slow the rate of computer systems innovation. The group advocated support for research in the areas of simulation frameworks, benchmarking methodologies, analytic methods, and validation techniques.

Original language	English (US)
Pages (from-to)	30-36
Number of pages	7
Journal	Computer
Volume	36
Issue number	8
DOIs	https://doi.org/10.1109/MC.2003.1220579
State	Published - Aug 2003

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10.1109/MC.2003.1220579

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title = "Challenges in computer architecture evaluation",

abstract = "In 2001, researchers met to discuss the experimental and evaluation problems that processor architecture research faces. The group agreed that current limitations and trends in evaluation techniques are troublesome and could noticeably slow the rate of computer systems innovation. The group advocated support for research in the areas of simulation frameworks, benchmarking methodologies, analytic methods, and validation techniques.",

author = "Kevin Skadron and Margaret Martonosi and August, {David I.} and Hill, {Mark D.} and Lilja, {David J.} and Pai, {Vijay S.}",

year = "2003",

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doi = "10.1109/MC.2003.1220579",

language = "English (US)",

volume = "36",

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journal = "Computer",

issn = "0018-9162",

publisher = "IEEE Computer Society",

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AU - Hill, Mark D.

AU - Lilja, David J.

AU - Pai, Vijay S.

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AB - In 2001, researchers met to discuss the experimental and evaluation problems that processor architecture research faces. The group agreed that current limitations and trends in evaluation techniques are troublesome and could noticeably slow the rate of computer systems innovation. The group advocated support for research in the areas of simulation frameworks, benchmarking methodologies, analytic methods, and validation techniques.

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Challenges in computer architecture evaluation

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