Abstract
N- and p-MOSFETs have been fabricated in strained Si on SiGe on insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-On-Insulator (SGOI) substrates. Mobility enhancement of 46% for electrons and 60-80% for holes (for 20%-25% Ge content, respectively) has been demonstrated in SSOI MOSFETs. This could lead to next generation device performance enhancement.
Original language | English (US) |
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Title of host publication | IEEE Symposium on VLSI Circuits, Digest of Technical Papers |
Pages | 57-58 |
Number of pages | 2 |
Edition | TECHNOLOGY SYMP. |
State | Published - Jan 1 2001 |
Event | 2001 VLSI Technology Symposium - Kyoto, Japan Duration: Jun 12 2001 → Jun 14 2001 |
Other
Other | 2001 VLSI Technology Symposium |
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Country/Territory | Japan |
City | Kyoto |
Period | 6/12/01 → 6/14/01 |