Embedded/edge computing comes with a very stringent hardware resource (area) budget and a need for extreme energy efficiency. This motivates repurposing, i.e., reconfiguring hardware resources on demand, where the overhead of reconfiguration itself is subject to the very same tight budgets in area and energy efficiency. Numerous applications running on resource constrained environments such as wearable devices and Internet-of-Things incorporate CAM (Content Addressable Memory) as a key computational building block. In this paper we present CAMeleon - a novel energy-efficient compute substrate which can seamlessly be reconfigured to perform CAM operations in addition to logic and memory functions. CAMeleon has a similar level of latency to conventional CAM designs based on SRAM and emerging memory technologies (such as STT-MTJ, ReRAM and PCM), however, performs CAM operations more energy-efficiently, consumes less area, and can support traditional logic and memory functions beyond CAM operations on demand thanks to its reconfigurability.
|Original language||English (US)|
|Title of host publication||GLSVLSI 2021 - Proceedings of the 2021 Great Lakes Symposium on VLSI|
|Publisher||Association for Computing Machinery|
|Number of pages||7|
|State||Published - Jun 22 2021|
|Event||31st Great Lakes Symposium on VLSI, GLSVLSI 2021 - Virtual, Online, United States|
Duration: Jun 22 2021 → Jun 25 2021
|Name||Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI|
|Conference||31st Great Lakes Symposium on VLSI, GLSVLSI 2021|
|Period||6/22/21 → 6/25/21|
Bibliographical noteFunding Information:
This work was supported in part by NSF grant no. SPX-1725420.
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