BlueShift: Designing processors for timing speculation from the ground up

Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig Zilles

Research output: Chapter in Book/Report/Conference proceedingConference contribution

69 Scopus citations

Abstract

Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting support to guarantee correctness. However, such Timing Speculation (TS) proposals are limited in that they assume traditional design methodologies that are suboptimal under TS. In this paper, we present a new approach where the processor itself is designed from the ground up for TS. The idea is to identify and optimize the most frequently-exercised critical paths in the design, at the expense of the majority of the static critical paths, which are allowed to suffer timing errors. Our approach and design optimization algorithm are called BlueShift. We also introduce two techniques that, when applied under BlueShift, improve processor performance: On-demand Selective Biasing (OSB) and Path Constraint Tuning (PCT). Our evaluation with modules from the OpenSPARC T1 processor shows that, compared to conventional TS, BlueShift with OSB speeds up applications by an average of 8% while increasing the processor power by an average of 12%. Moreover, compared to a high-performance TS design, BlueShift with PCT speeds up applications by an average of 6% with an average processor power overhead of 23% - providing a way to speed up logic modules that is orthogonal to voltage scaling.

Original languageEnglish (US)
Title of host publicationProceedings - 15th International Symposium on High-Performance Computer Architecture, HPCA - 15 2009
PublisherIEEE Computer Society
Pages213-224
Number of pages12
ISBN (Print)9781424429325
DOIs
StatePublished - 2009
EventIEEE 15th International Symposium on High Performance Computer Architecture, HPCA 2009 - Raleigh, United States
Duration: Feb 14 2009Feb 18 2009

Publication series

NameProceedings - International Symposium on High-Performance Computer Architecture
ISSN (Print)1530-0897

Conference

ConferenceIEEE 15th International Symposium on High Performance Computer Architecture, HPCA 2009
CountryUnited States
CityRaleigh
Period2/14/092/18/09

Bibliographical note

Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.

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