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Balancing reuse opportunities and performance gains with subblock value reuse
Jian Huang, David J. Lilja
Electrical and Computer Engineering
Research output
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peer-review
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Keyphrases
Performance Gain
100%
Compiler Assisted
100%
Skipping
66%
Superscalar Processor
66%
Performance Potential
66%
Value Prediction
66%
Reuse Strategy
66%
Detection Method
33%
Compiler
33%
Instruction-level Parallelism
33%
Detection Time
33%
Granularity
33%
Dynamic Approach
33%
Single Instruction
33%
Best Performers
33%
Redundant Computation
33%
Redundant Instruction
33%
Amount of Work
33%
Operand
33%
Computer Science
Performance Gain
100%
Superscalar Processor
100%
Prediction Value
100%
Instruction-Level Parallelism
50%
Granularity
50%
Store Instruction
50%
Single Instruction
50%
Good Performance
50%
Detection Process
50%
Computer Hardware
50%