Automated synthesis of mixed-signal ML inference hardware under accuracy constraints

Kishor Kunal, Jitesh Poojary, S. Ramprasath, Ramesh Harjani, Sachin S. Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Due to the inherent error-tolerance of machine learning (ML) algorithms, many parts of the inference computation can be performed with adequate accuracy and low power under relatively low precision. Early approaches have used digital approximate computing methods to explore this space. Recent approaches using analog-based operations achieve power-efficient computation at moderate precision. This work proposes a mixed-signal optimization (MiSO) approach that optimally blends analog and digital computation for ML inference. Based on accuracy and power models, an integer linear programming formulation is used to optimize design metrics of analog/digital implementations. The efficacy of the method is demonstrated on multiple ML architectures.

Original languageEnglish (US)
Title of host publicationASP-DAC 2024 - 29th Asia and South Pacific Design Automation Conference, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages478-483
Number of pages6
ISBN (Electronic)9798350393545
DOIs
StatePublished - 2024
Event29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024 - Incheon, Korea, Republic of
Duration: Jan 22 2024Jan 25 2024

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024
Country/TerritoryKorea, Republic of
CityIncheon
Period1/22/241/25/24

Bibliographical note

Publisher Copyright:
© 2024 IEEE.

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