Area efficient controller design of barrel shifters for reconfigurable LDPC decoders

Daesun Oh, Keshab K. Parhi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

In this paper, we propose an efficient controller design of barrel shifter for reconfigurable low-density parity-check (LDPC) decoders, whcih leads to significant reduction in hardware complexity. Since the structured LDPC codes for the most modern wireless communication systems include multiple code rates, various block lengths, and different sizes of submatrices, a reconfigurable LDPC decoder is desirable and the barrel shifter needs to be programmable. Even though the Benes network can be optimized for the barrel shifting networks of reconfigurable LDPC decoder, it is not trivial to generate all the control signals for numerous 2x2 switches on-the-fly. A novel simplified algorithm capable of generating all the control signals is proposed using the properties that both the full-size Benes network can be broken into two half-size Benes networks and the barrel shifters needed in the structured LDPC decoders require only cyclic shifts. The proposed algorithm can be easily implemented with a small numbers of gates. Compared with the direct implementation using a dedicated look-up table, the proposed algorithm achieves a significant hardware reduction in implementing a reconfigurable LDPC decoder.

Original languageEnglish (US)
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages240-243
Number of pages4
DOIs
StatePublished - Sep 19 2008
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: May 18 2008May 21 2008

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/TerritoryUnited States
CitySeattle, WA
Period5/18/085/21/08

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