ARCHITECTURE FOR A VHSIC COMPUTER.

L. L. Kinney, W. Y. Yueh, W. L. Heimerdinger, R. R. Ramseyer, J. W. Thomas

Research output: Contribution to conferencePaper

Abstract

The technology limitations imposed by a VHSIC technology are discussed, a computer structure implied by these limitations is proposed, and the throughput for this computer system is estimated.

Original languageEnglish (US)
Pages459-469
Number of pages11
StatePublished - Jan 1 2017
EventConf Proc Annu Symp Comput Archit 8th - Minneapolis, MN, USA
Duration: May 12 1981May 14 1981

Other

OtherConf Proc Annu Symp Comput Archit 8th
CityMinneapolis, MN, USA
Period5/12/815/14/81

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  • Cite this

    Kinney, L. L., Yueh, W. Y., Heimerdinger, W. L., Ramseyer, R. R., & Thomas, J. W. (2017). ARCHITECTURE FOR A VHSIC COMPUTER.. 459-469. Paper presented at Conf Proc Annu Symp Comput Archit 8th, Minneapolis, MN, USA, .