Analysis of statistical sampling in microarchitecture simulation: Metric, methodology and program characterization

Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Wei Chung Hsu, Pen Chung Yew

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Statistical sampling, especially stratified random sampling, is a promising technique for estimating the performance of the benchmark program without executing the complete program on microarchitecture simulators or real machines. The accuracy of the performance estimate and the simulation cost depend on the three parameters, namely the interval size, the sample size, and the number of phases (or strata). Optimum values for these three parameters depends on the performance behavior of the program and the microarchitecture configuration being evaluated. In this paper, we quantify the effect of these three parameters and their interactions on the accuracy of the performance estimate and simulation cost. We use the Confidence Interval of estimated Mean (CIM), a metric derived from statistical sampling theory, to measure the accuracy of the performance estimate; we also discuss why CIM is an appropriate metric for this analysis. We use the total number of instructions simulated and the total number of samples measured as cost parameters. Finally, we characterize 21 SPEC CPU2000 benchmarks based on our analysis.

Original languageEnglish (US)
Title of host publicationProceedings of the 2007 IEEE International Symposium on Workload Characterization, IISWC
Pages139-148
Number of pages10
DOIs
StatePublished - Dec 1 2007
Event2007 IEEE International Symposium on Workload Characterization, IISWC - Boston, MA, United States
Duration: Sep 27 2007Sep 29 2007

Publication series

NameProceedings of the 2007 IEEE International Symposium on Workload Characterization, IISWC

Other

Other2007 IEEE International Symposium on Workload Characterization, IISWC
Country/TerritoryUnited States
CityBoston, MA
Period9/27/079/29/07

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