Analysis and design of a 5 GS/s analog charge-domain FFT for an SDR front-end in 65 nm CMOS

Bodhisatwa Sadhu, Martin Sturm, Brian M. Sadler, Ramesh Harjani

Research output: Contribution to journalArticlepeer-review

34 Scopus citations


This work describes the design of a 16 point analog domain FFT using a Charge Re-use Analog Fourier Transform (CRAFT) engine. The circuit relies on charge re-use to achieve 47 dB average output SNDR on an instantaneous input bandwidth of 5 GHz, and consumes only 3.8 mW (12.2 pJ/conv.). The CRAFT engine is used as a wide-band, low power RF front-end channelizer for software defined radio (SDR) applications. The paper also discusses the handling of circuit non-idealities for the CRAFT design: their significance, modeling, and circuit techniques for their mitigation. These techniques enable this implementation to achieve a large dynamic range even at high speeds.

Original languageEnglish (US)
Pages (from-to)1199-1211
Number of pages13
JournalIEEE Journal of Solid-State Circuits
Issue number5
StatePublished - May 1 2013


  • Analog integrated circuits
  • Analytical models
  • Channel bank filters
  • Cognitive radio
  • Demodulation
  • Discrete Fourier transforms
  • Discrete cosine transforms
  • FET integrated circuits
  • FIR filters
  • Fast Fourier transforms
  • Filtering
  • Integrated circuit modeling
  • Integrated circuit noise
  • Linear circuits
  • MOS integrated circuits
  • Mixed analog digital integrated circuits
  • Modulation
  • Multiple signal classification
  • Multiplying circuits
  • OFDM
  • Passive circuits
  • Passive filters
  • Phase shifters
  • RF signals
  • Radio spectrum management
  • Radio-frequency integrated circuits
  • Sampled data circuits
  • Signal analysis
  • Signal detection
  • Signal sampling
  • Signal to noise ratio
  • Software defined radio
  • Software radio
  • Spectral analysis
  • Summing circuits
  • Switched capacitor
  • Switched circuits
  • Transforms
  • Very high speed integrated circuits


Dive into the research topics of 'Analysis and design of a 5 GS/s analog charge-domain FFT for an SDR front-end in 65 nm CMOS'. Together they form a unique fingerprint.

Cite this