Analog VLSI neural chips for real-time identification and control

Jiann-Shiou Yang; Yiwen Wang

Analog VLSI neural chips for real-time identification and control

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Analog CMOS neural chips with on-chip learning are explored to provide efficient and inexpensive electronics for various tasks in real-time identification and control. Hardware learning circuits can successfully obtain a set of synaptic weights for multilayer feedforward neural networks that approximately satisfy any nonlinear mapping in the order of milliseconds. The fast on-chip learning can identify nonlinear dynamical systems to avoid the modeling uncertainty and parameter variations in real-time. Model reference adaptive control with on-line identification using the neural chips are also proposed.

Original language	English (US)
Title of host publication	Proceedings of the International Joint Conference on Neural Networks
Publisher	Publ by IEEE
Pages	2779-2782
Number of pages	4
ISBN (Print)	0780314212, 9780780314214
State	Published - 1993
Event	Proceedings of 1993 International Joint Conference on Neural Networks. Part 1 (of 3) - Nagoya, Jpn Duration: Oct 25 1993 → Oct 29 1993

Publication series

Name	Proceedings of the International Joint Conference on Neural Networks
Volume	3

Other

Other	Proceedings of 1993 International Joint Conference on Neural Networks. Part 1 (of 3)
City	Nagoya, Jpn
Period	10/25/93 → 10/29/93

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Analog VLSI neural chips for real-time identification and control. / Yang, Jiann-Shiou; Wang, Yiwen.
Proceedings of the International Joint Conference on Neural Networks. Publ by IEEE, 1993. p. 2779-2782 (Proceedings of the International Joint Conference on Neural Networks; Vol. 3).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yang, J-S & Wang, Y 1993, Analog VLSI neural chips for real-time identification and control. in Proceedings of the International Joint Conference on Neural Networks. Proceedings of the International Joint Conference on Neural Networks, vol. 3, Publ by IEEE, pp. 2779-2782, Proceedings of 1993 International Joint Conference on Neural Networks. Part 1 (of 3), Nagoya, Jpn, 10/25/93.

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abstract = "Analog CMOS neural chips with on-chip learning are explored to provide efficient and inexpensive electronics for various tasks in real-time identification and control. Hardware learning circuits can successfully obtain a set of synaptic weights for multilayer feedforward neural networks that approximately satisfy any nonlinear mapping in the order of milliseconds. The fast on-chip learning can identify nonlinear dynamical systems to avoid the modeling uncertainty and parameter variations in real-time. Model reference adaptive control with on-line identification using the neural chips are also proposed.",

author = "Jiann-Shiou Yang and Yiwen Wang",

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ER -

Analog VLSI neural chips for real-time identification and control

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