TY - GEN
T1 - Analog circuit synthesis and exploration in OASYS
AU - Harjani, Ramesh
AU - Rutenbar, Rob A.
AU - Carley, L. Richard
PY - 1988
Y1 - 1988
N2 - Experimental results obtained with OASYS, a behavior-to-structure synthesis tool for analog circuits, are described. In particular, measurements from fabricated analog ICs based on OASYS-synthesized designs are presented, and used to verify that OASYS is capable of producing real, functional circuits. Possibilities for automatically exploring the space of designable analog circuits, an ability made possible by a fast, automatic synthesis tool such as OASYS, are also described. Examples of using OASYS to explore tradeoffs among process and performance specifications are presented.
AB - Experimental results obtained with OASYS, a behavior-to-structure synthesis tool for analog circuits, are described. In particular, measurements from fabricated analog ICs based on OASYS-synthesized designs are presented, and used to verify that OASYS is capable of producing real, functional circuits. Possibilities for automatically exploring the space of designable analog circuits, an ability made possible by a fast, automatic synthesis tool such as OASYS, are also described. Examples of using OASYS to explore tradeoffs among process and performance specifications are presented.
UR - http://www.scopus.com/inward/record.url?scp=0024136036&partnerID=8YFLogxK
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M3 - Conference contribution
AN - SCOPUS:0024136036
SN - 0818608722
T3 - 1988 IEEE Int Conf Comput Des VLSI Comput Process ICCD 88 Proc
SP - 44
EP - 47
BT - 1988 IEEE Int Conf Comput Des VLSI Comput Process ICCD 88 Proc
PB - Publ by IEEE
ER -