Abstract
The high computation and memory storage of large deep neural networks (DNNs) models pose intensive challenges to the conventional Von-Neumann architecture, incurring sub-stantial data movements in the memory hierarchy. The memristor crossbar array has emerged as a promising solution to mitigate the challenges and enable low-power acceleration of DNNs. Memristor-based weight pruning and weight quantization have been seperately investigated and proven effectiveness in reducing area and power consumption compared to the original DNN model. However, there has been no systematic investigation of memristor-based neuromorphic computing (NC) systems considering both weight pruning and weight quantization. In this paper, we propose an unified and systematic memristor-based framework considering both structured weight pruning and weight quantization by incorporating alternating direction method of multipliers (ADMM) into DNNs training. We consider hardware constraints such as crossbar blocks pruning, conductance range, and mismatch between weight value and real devices, to achieve high accuracy and low power and small area footprint. Our framework is mainly integrated by three steps, i.e., memristor-based ADMM regularized optimization, masked mapping and retraining. Experimental results show that our proposed framework achieves 29.81× (20.88×) weight compression ratio, with 98.38% (96.96%) and 98.29% (97.47%) power and area reduction on VGG-16 (ResNet-18) network where only have 0.5% (0.76%) accuracy loss, compared to the original DNN models. We share our models at anonymous link http://bit.ly/2Jp5LHJ.
Original language | English (US) |
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Title of host publication | International Symposium on Low Power Electronics and Design, ISLPED 2019 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781728129549 |
DOIs | |
State | Published - Jul 2019 |
Externally published | Yes |
Event | 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019 - Lausanne, Switzerland Duration: Jul 29 2019 → Jul 31 2019 |
Publication series
Name | Proceedings of the International Symposium on Low Power Electronics and Design |
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Volume | 2019-July |
ISSN (Print) | 1533-4678 |
Conference
Conference | 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019 |
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Country/Territory | Switzerland |
City | Lausanne |
Period | 7/29/19 → 7/31/19 |
Bibliographical note
Publisher Copyright:© 2019 IEEE.