This paper proposes an intra-iterative interference cancellation (IIC) detector based on convex optimization for large-scale MIMO systems. By utilizing Newton's method to solve the optimization problem, a hardware-friendly detector is implemented in a 65 nm CMOS technology. The proposed detector has a throughput of 3.6 Gb/s with a 600 MHz operating frequency. The simulation results indicate that the block-error rate (BLER) performance of the proposed method can approach that of the minimum mean square error (MMSE) detector. The design is found to be more efficient than other recently proposed MIMO detector implementations.
|Original language||English (US)|
|Number of pages||11|
|Journal||IEEE Transactions on Circuits and Systems I: Regular Papers|
|State||Published - Nov 2016|
Bibliographical noteFunding Information:
This work was supported by National Natural Science Foundation of China under Grant 61501084 and the Fundamental Research Funds for the Central Universities A03012023601002.
- Convex optimization
- intra-iterative interference cancellation
- large-scale MIMO