A new time-domain model for the slewing behavior of two stage opamps is presented. This model includes the effects of the load capacitance, compensation capacitance, device sizes and the nonlinear behavior of the transistors during the slewing period. This model improves on the commonly used constant current models and allows for more predictable designs. The model shows good agreement with simulations. Circuit design results using the traditional and new improved models are presented.
|Original language||English (US)|
|Number of pages||3|
|Journal||IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing|
|State||Published - Oct 1995|
Bibliographical noteFunding Information:
Manuscript received March 20, 1995; revlsed July 27, 1995. This work was supported in part by a grant from Rosemount Inc., Eden Praire, MN. This paper was recommended by Associate Editor S. Kiaei. The authors are with the Department of Electrical Engineering, University of Minnesota, Minneapolis, MN 55455 USA. IEEE Log Number 95 148 16D.