TY - JOUR
T1 - An exploration-based binding and scheduling technique for synthesis of digital blocks for mixed-signal apllications
AU - Thepayasuwan, Nattawut
AU - Tang, Hua
AU - Doboli, Alex
PY - 2003
Y1 - 2003
N2 - The design of mixed analog-digital systems requires new CAD tools, as specific performance requirements need to be tackled i.e. simultaneous switching noise (SSN). This paper proposes a novel technique for resource binding and operation scheduling. The goal is to maximize the latency of the digital hardware such that its SSN is kept within feasible limits. The technique includes two steps: (1) for each input specifications, Performance Models (PM) are automatically generated for the overall throughput and SSN values, and (2) PMs are employed by an exploration algorithm to find the best resource binding and operation scheduling alternative. Experiments showed the ability of the proposed technique to find good solutions as compared to traditional high-level synthesis methods.
AB - The design of mixed analog-digital systems requires new CAD tools, as specific performance requirements need to be tackled i.e. simultaneous switching noise (SSN). This paper proposes a novel technique for resource binding and operation scheduling. The goal is to maximize the latency of the digital hardware such that its SSN is kept within feasible limits. The technique includes two steps: (1) for each input specifications, Performance Models (PM) are automatically generated for the overall throughput and SSN values, and (2) PMs are employed by an exploration algorithm to find the best resource binding and operation scheduling alternative. Experiments showed the ability of the proposed technique to find good solutions as compared to traditional high-level synthesis methods.
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M3 - Conference article
AN - SCOPUS:0038081302
SN - 0271-4310
VL - 5
SP - V629-V632
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - Proceedings of the 2003 IEEE International Symposium on Circuits and Systems
Y2 - 25 May 2003 through 28 May 2003
ER -