An 8bit two-step time-to-digital converter (TDC) with a novel digital switched ring-oscillator based time amplifier (TA) is demonstrated in 65nm CMOS. The proposed TA achieves a predictable and programmable gain without requiring any calibration. The implemented 8bit two-step TDC with a 16x TA gain achieves a time resolution of 2.6ps at 80MS/s conversion rate while consuming 2mW. The measured DNL and INL are 1.84LSB and 2.36LSB, respectively. The TDC area is 0.07mm2.
|Original language||English (US)|
|Title of host publication||2015 IEEE Custom Integrated Circuits Conference, CICC 2015|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - Nov 25 2015|
|Event||IEEE Custom Integrated Circuits Conference, CICC 2015 - San Jose, United States|
Duration: Sep 28 2015 → Sep 30 2015
|Name||Proceedings of the Custom Integrated Circuits Conference|
|Other||IEEE Custom Integrated Circuits Conference, CICC 2015|
|Period||9/28/15 → 9/30/15|
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© 2015 IEEE.