An 8bit, 2.6ps two-step TDC in 65nm CMOS employing a switched ring-oscillator based time amplifier

Bongjin Kim, Hoonki Kim, Chris H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

23 Scopus citations

Abstract

An 8bit two-step time-to-digital converter (TDC) with a novel digital switched ring-oscillator based time amplifier (TA) is demonstrated in 65nm CMOS. The proposed TA achieves a predictable and programmable gain without requiring any calibration. The implemented 8bit two-step TDC with a 16x TA gain achieves a time resolution of 2.6ps at 80MS/s conversion rate while consuming 2mW. The measured DNL and INL are 1.84LSB and 2.36LSB, respectively. The TDC area is 0.07mm2.

Original languageEnglish (US)
Title of host publication2015 IEEE Custom Integrated Circuits Conference, CICC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479986828
DOIs
StatePublished - Nov 25 2015
EventIEEE Custom Integrated Circuits Conference, CICC 2015 - San Jose, United States
Duration: Sep 28 2015Sep 30 2015

Publication series

NameProceedings of the Custom Integrated Circuits Conference
Volume2015-November
ISSN (Print)0886-5930

Other

OtherIEEE Custom Integrated Circuits Conference, CICC 2015
Country/TerritoryUnited States
CitySan Jose
Period9/28/159/30/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

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