Abstract
For the last decade, there have been varying techniques for hardware prefetching to improve the system performance. However, untimely prefetching may pollution caches and resulting into significant performance degradation. In this work, we introduce an Adaptive Granularity and coordinated Prefetching (AGP) that consists of a coarse-grained and fine-grained prefetched mechanism to provide a better caching environment for parallel applications. AGP targets on the degree-adjusting and location-choosing and tries to minimize the influence caused by prefetcher for each core. AGP could produce more timely prefetched requests reducing the cache pollutions and contentions. Across a variety of PARSEC benchmarks, AGP can contribute 6.5% (up to 36%) of performance improvement on a 4-core multicore system compared to the non-prefetching.
Original language | English (US) |
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Title of host publication | 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781479962754 |
DOIs | |
State | Published - May 28 2015 |
Event | 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 - Hsinchu, Taiwan, Province of China Duration: Apr 27 2015 → Apr 29 2015 |
Publication series
Name | 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 |
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Other
Other | 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 |
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Country/Territory | Taiwan, Province of China |
City | Hsinchu |
Period | 4/27/15 → 4/29/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.