Abstract
The performance of a circuit depends on its clock period. The shorter a valid clock period is, the better the performance is. The clock period is tightly related to the difference between the longest propagation delay and the shortest propagation delay from primary inputs to primaxy outputs. The objective of this paper is to minimize the amount of delay inserted while achieving the shortest clock period. Inserting delay buffers is done after traditional delay optimization. We propose an optimal algorithm based on a novel linear programming formulation. Our algorithm can also be used to solve similar delay buffer problems.
Original language | English (US) |
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Title of host publication | Algorithms and Computation - 5th International Symposium, ISAAC 1994, Proceedings |
Editors | Ding-Zhu Du, Ding-Zhu Du, Xiang-Sun Zhang |
Publisher | Springer Verlag |
Pages | 669-677 |
Number of pages | 9 |
ISBN (Print) | 9783540583257 |
DOIs | |
State | Published - 1994 |
Event | 5th Annual International Symposium on Algorithms and Computation, ISAAC 1994 - Beijing, China Duration: Aug 25 1994 → Aug 27 1994 |
Publication series
Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
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Volume | 834 LNCS |
ISSN (Print) | 0302-9743 |
ISSN (Electronic) | 1611-3349 |
Other
Other | 5th Annual International Symposium on Algorithms and Computation, ISAAC 1994 |
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Country/Territory | China |
City | Beijing |
Period | 8/25/94 → 8/27/94 |
Bibliographical note
Publisher Copyright:© 1994, Springer Verlag. All rights reserved.