Accurate estimation of global buffer delay within a floorplan

Computer Science

• Buffer Insertion 100%
• Approximation (Algorithm) 33%
• Floorplanning 33%
• Timing Analysis 33%
• Interconnect Delay 33%
• Global Routing 33%
• Physical Design 33%
• closed-form expression 33%
• Potential Application 33%

Keyphrases

• Buffer Delay 100%
• Delay Approximation 33%