@inproceedings{a2aaf2b69ae74ee58032266a0b51fec0,
title = "A write-back-free 2T1D embedded DRAM with local voltage sensing and a dual-row-access low power mode",
abstract = "A gain cell embedded DRAM (eDRAM) in a 65nm LP process achieves a 1.0 GHz random read access frequency by eliminating the write-back operation. The read bitline swing of the 2T1D cell is improved by employing short local bitlines connected to local voltage sense amplifiers. A low-overhead dual-row access mode improves the worst-case cell retention time by 3X, minimizing refresh power at times when only a fraction of the entire memory is utilized. Measurement results from a 64kb eDRAM test chip in 65nm CMOS demonstrate the effectiveness of the proposed circuit techniques.",
author = "Wei Zhang and Chun, {Ki Chul} and Kim, {Chris H.}",
year = "2012",
month = nov,
day = "26",
doi = "10.1109/CICC.2012.6330623",
language = "English (US)",
isbn = "9781467315555",
series = "Proceedings of the Custom Integrated Circuits Conference",
booktitle = "Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012",
note = "34th Annual Custom Integrated Circuits Conference, CICC 2012 ; Conference date: 09-09-2012 Through 12-09-2012",
}