A voltage scalable 0.26V, 64kb 8T SRAM with v_min lowering techniques and deep sleep mode

Keyphrases

• 8T SRAM 100%
• Deep Sleep Mode 100%
• Vmin 100%
• Bitline 100%
• Reading Performance 33%
• 130 Nm CMOS 33%
• Write Margin 33%
• Bitline Leakage 33%
• Read Operation 33%
• Leakage Power 33%
• Standby Leakage Power 33%
• CMOS Process 33%
• Reverse Short Channel Effect 33%
• Low Vmin 33%
• Wordline 33%
• Leakage Compensation 33%
• Active Leakage Control 33%
• Compensation Schemes 33%
• Pulse Width Control 33%

Engineering

• Deep Sleep 100%
• Sleep Mode 100%
• Electric Power Utilization 50%
• Pulse Duration 50%

Computer Science

• Bitline 100%
• Power Consumption 25%
• Wordline 25%
• Read Operation 25%
• Read Performance 25%