A timing model incorporating the effect of crosstalk on delay and its application to optimal channel routing

Research output: Contribution to journalArticlepeer-review

65 Scopus citations

Abstract

Crosstalk is generally recognized as a major problem in intergrated circuit design. This paper presents a novel approach to the efficient measurement of the effect of crosstalk on the delay of a net using an algorithm whose worst case complexity is polynomial-time in the number of nets. The cost of the algorithm is seen to be O(n log n) in practice, where n is the number of nets, and it is amenable to being incorporated into the inner loop of a timing optimizer. To illustrate this, the method is applied to reduce the effects of crosstalk in channel routing, where it is seen to give an average improvement of 23% in the delay in a channel as compared to the worst case, as measured by SPICE.

Original languageEnglish (US)
Pages (from-to)550-559
Number of pages10
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume19
Issue number5
DOIs
StatePublished - 2000

Bibliographical note

Funding Information:
Manuscript received February 28, 1999; revised September 24, 1999. This work was supported in part by the Semiconductor Research Corporation (SRC) under Contract 98-DJ-609 and in part by the National Science Foundation (NSF) under Award CCR-9800992. This paper was recommended by Associate Editor C.-K. Cheng.

Keywords

  • Capacitive coupling
  • Crosstalk
  • Delay
  • Simulation, timing

Fingerprint Dive into the research topics of 'A timing model incorporating the effect of crosstalk on delay and its application to optimal channel routing'. Together they form a unique fingerprint.

Cite this