@inproceedings{2bc0bf8f55294cc2b82840a3916b5f76,
title = "A study of the performance potential for dynamic instruction hints selection",
abstract = "Instruction hints have become an important way to communicate compile-time information to the hardware. They can be generated by the compiler and the post-link optimizer to reduce cache misses, improve branch prediction and minimize other performance bottlenecks. This paper discusses different instruction hints available on modern processor architectures and shows the potential performance impact on many benchmark programs. Some hints can be effectively selected at compile time with profile feedback. However, since the same program executable can behave differently on various inputs and performance bottlenecks may change on different micro-architectures, significant performance opportunities can be exploited by selecting instruction hints dynamically.",
author = "Rao Fu and Jiwei Lu and Antonia Zhai and Hsu, {Wei Chung}",
note = "Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 11th Asia-Pacific Conference on Advances in Computer Systems Architecture, ACSAC 2006 ; Conference date: 06-09-2006 Through 08-09-2006",
year = "2006",
doi = "10.1007/11859802_7",
language = "English (US)",
isbn = "3540400567",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "67--80",
booktitle = "Advances in Computer Systems Architecture - 11th Asia-Pacific Conference, ACSAC 2006, Proceedings",
}