A Stochastic Computing Scheme of Embedding Random Bit Generation and Processing in Computational Random Access Memory (SC-CRAM)

Brandon R. Zink; Yang Lv; Masoud Zabihi; Husrev Cilasun; Sachin S. Sapatnekar; Ulya R. Karpuzcu; Marc D. Riedel; Jian Ping Wang

doi:10.1109/JXCDC.2023.3266136

A Stochastic Computing Scheme of Embedding Random Bit Generation and Processing in Computational Random Access Memory (SC-CRAM)

Brandon R. Zink, Yang Lv, Masoud Zabihi, Husrev Cilasun, Sachin S. Sapatnekar, Ulya R. Karpuzcu, Marc D. Riedel, Jian Ping Wang

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

4 Scopus citations

Abstract

Stochastic computing (SC) has emerged as a promising solution for performing complex functions on large amounts of data to meet future computing demands. However, the hardware needed to generate random bit-streams using conventional CMOS-based technologies drastically increases the area and delay cost. Area costs can be reduced using spintronics-based random number generators (RNGs), and however, this will not alleviate the delay costs since stochastic bit generation is still performed separately from the computation. In this article, we present an SC method of embedding stochastic bit generation and processing in a computational random access memory (CRAM) array, which we refer to as SC-CRAM. We demonstrate that SC-CRAM is a resilient and low-cost method for image processing, Bayesian inference systems, and Bayesian belief networks.

Original language	English (US)
Pages (from-to)	29-37
Number of pages	9
Journal	IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Volume	9
Issue number	1
DOIs	https://doi.org/10.1109/JXCDC.2023.3266136
State	Published - Jun 1 2023

Bibliographical note

Funding Information:
This work was supported in part by the Center for Probabilistic Spin Logic for Low-Energy Boolean and Non-Boolean Computing (CAPSL), one of the Nanoelectronic Computing Research (nCORE) centers as task 2759.001;

Publisher Copyright:
Author

Keywords

Bayesian systems
computational random access memory (CRAM)
magnetic tunnel junction (MTJ)
neuromorphic computing
stochastic computing (SC)

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10.1109/JXCDC.2023.3266136

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Zink, B. R., Lv, Y., Zabihi, M., Cilasun, H., Sapatnekar, S. S., Karpuzcu, U. R., Riedel, M. D., & Wang, J. P. (2023). A Stochastic Computing Scheme of Embedding Random Bit Generation and Processing in Computational Random Access Memory (SC-CRAM). IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 9(1), 29-37. https://doi.org/10.1109/JXCDC.2023.3266136

Zink, BR, Lv, Y, Zabihi, M, Cilasun, H, Sapatnekar, SS , Karpuzcu, UR , Riedel, MD & Wang, JP 2023, 'A Stochastic Computing Scheme of Embedding Random Bit Generation and Processing in Computational Random Access Memory (SC-CRAM)', IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 9, no. 1, pp. 29-37. https://doi.org/10.1109/JXCDC.2023.3266136

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A Stochastic Computing Scheme of Embedding Random Bit Generation and Processing in Computational Random Access Memory (SC-CRAM)

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