A simplified model of Carbon nanotube transistor with applications to analog and digital design

Saurabh Sinha, Asha Balijepalli, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

A compact model for the Carbon nanotube transistor (CNFET) is presented in this work. This simple model aids the first-order analysis for digital and analog design with CNFET. Based on the physical understanding of ballistic transport in the CNFET channel and tunneling at the Schottky barrier contacts, we develop a set of closed-form expressions that predict the device behavior with varying process and bias conditions. Using this model, we compare a CNFET with 22nm MOSFET in both digital and analog domains. We conclude that (1) a CNFET digital circuit can be more than 10X faster than 22nm CMOS; (2) there is 10X improvement in gm for comparable device dimensions, and (3) >25X improvement in gDS for comparable saturation current. This simple, scalable model is an efficient tool for analytical treatment of CNFET based circuits, revealing potential design opportunities, especially in the analog domain.

Original languageEnglish (US)
Title of host publicationProceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
Pages502-507
Number of pages6
DOIs
StatePublished - 2008
Externally publishedYes
Event9th International Symposium on Quality Electronic Design, ISQED 2008 - San Jose, CA, United States
Duration: Mar 17 2008Mar 19 2008

Publication series

NameProceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008

Conference

Conference9th International Symposium on Quality Electronic Design, ISQED 2008
Country/TerritoryUnited States
CitySan Jose, CA
Period3/17/083/19/08

Fingerprint

Dive into the research topics of 'A simplified model of Carbon nanotube transistor with applications to analog and digital design'. Together they form a unique fingerprint.

Cite this