A Self-Aligned Gate Iii-V Heterostructure Fet Process For Ultrahigh-Speed Digital And Mixed Analog/Digital Lsi/Vlsi Circuits

A planar ion-implanted self-aligned gate process for the fabrication of high-speed digital and mixed analog/digital LSI/VLSI integrated circuits is reported. A 4-bit analog-to-digital converter, a 2500-gate 8 x 8 multiplier/accumulator and a 4500-gate 16 x 16 complex multiplier have been demonstrated using enhancement-mode (e-mode) n+ — (Al, Ga) As/MODFET’s, superlattice MODFET’s, and doped channel heterostructure field-effect transistors (DCHFET), whose epitaxial layers were grown by molecular-beam epitaxy. With nominal 1-m gate-length devices, direct-coupled FET logic (DCFL) ring oscillators, having realistic circuit structures, have propagation delays of 30 ps/stage at a power dissipation of 1.2 mW/stage. In LSI circuit operation, these gates have delays of 89 ps/gate at a power dissipation of 1.38 mW/gate when loaded with an average fan-out of 2.5 gates and about 1000 gm of high-density interconnects. Highperformance voltage comparator circuits operated at sampling rates greater than 2.5 GHz at Nyquist analog input rates and with static hysterisis less than 1 mV at room temperature. Fully functional 4-bit A-to-D circuits operating at frequencies up to 2 GHz were obtained. To our knowledge, these are the largest digital and mixed analog/digital circuits ever reported using MBE-grown LSI heterostructure FET technology.