A Robust Power Hardware-in-the-Loop Interface Under Uncertain Software and Hardware System

The power hardware-in-the-loop (PHIL) framework provides an attractive platform for evaluating new frameworks and power hardware including transformers, converters and machines. It allows for conducting diverse tests on a laboratory scale, providing results that closely resemble real-world scenarios, all while avoiding the high costs and risks associated with experimentation on a full-scale power system. However, despite its advantages of the PHIL framework, considerable challenges remain where often the performance is not robust and the fidelity to the real-world needs to be quantified and improved. This article addresses these challenges by synthesizing an interface between the hardware and software components of PHIL while employing a modern control perspective for managing inherent uncertainties. The article provides a methodology that quantifies model uncertainty caused by the point-of-connection in the emulated power network of the software system and the model uncertainty stemming from the varying nature of the hardware-under-test. To overcome these uncertainties, the article proposes a robust PHIL interface controller based on µ-synthesis. This controller ensures multiple objectives are met that includes robust stability, performance, accuracy, and tracking capabilities. To assess the effectiveness and viability of the proposed PHIL interface, a PHIL experiment is conducted. The experiment involves interfacing an emulated software system based on a 225-bus, 110 V, 60 Hz, 1 MW residential subnetwork of the University of Minnesota and suburb Minneapolis. The interface is established using a real-time simulator and a physical hardware system consisting of two 1-∅ 1.67 kVA inverter systems and one linear and nonlinear load, each with a capacity of 1.8 kVA.