TY - GEN
T1 - A reconfigurable FPGA-based readback signal generator for hard-drive read channel simulator
AU - Chen, Jinghuan
AU - Moon, Jaekyun
AU - Bazargan, Kia
PY - 2002
Y1 - 2002
N2 - A hard disk readback signal generator designed to provide noise-corrupted signals to a channel simulator has been implemented on a Xilinx Virtex™ E FPGA device. The generator simulates pulses sensed by read heads in hard drives. All major distortion and noise processes, such as intersymbol interference, transition noise, electronics noise, head and media nonlinearity, intertrack interference, and write timing error, can be generated according to the statistics and parameters defined by the user. Reconfigurable implementation enables an update of the signal characteristics in runtime. The user also has the flexibility to choose from a set of bitstreams to simulate particular combinations of noise and distortion. Such customized restructuring helps reduce the area consumption and hence virtually increase the capacity of the FPGA device. The time to generate the readback signals has been reduced by four orders compared to its software counterpart.
AB - A hard disk readback signal generator designed to provide noise-corrupted signals to a channel simulator has been implemented on a Xilinx Virtex™ E FPGA device. The generator simulates pulses sensed by read heads in hard drives. All major distortion and noise processes, such as intersymbol interference, transition noise, electronics noise, head and media nonlinearity, intertrack interference, and write timing error, can be generated according to the statistics and parameters defined by the user. Reconfigurable implementation enables an update of the signal characteristics in runtime. The user also has the flexibility to choose from a set of bitstreams to simulate particular combinations of noise and distortion. Such customized restructuring helps reduce the area consumption and hence virtually increase the capacity of the FPGA device. The time to generate the readback signals has been reduced by four orders compared to its software counterpart.
UR - https://www.scopus.com/pages/publications/0036059444
UR - https://www.scopus.com/pages/publications/0036059444#tab=citedBy
U2 - 10.1145/514005.514008
DO - 10.1145/514005.514008
M3 - Conference contribution
AN - SCOPUS:0036059444
SN - 1581134614
T3 - Proceedings - Design Automation Conference
SP - 349
EP - 354
BT - Proceedings of the 39th Annual Design Automation Conference, DAC'02
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 39th Design Automation Conference
Y2 - 10 June 2002 through 14 June 2002
ER -