A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS

Minkyu Kim; Abinash Mohanty; Deepak Kadetotad; Naveen Suda; Luning Wei; Pooja Saseendran; Xiaofei He; Yu Cao; Jae Sun Seo

doi:10.1109/ASPDAC.2017.7858282

A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS

Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Naveen Suda, Luning Wei, Pooja Saseendran, Xiaofei He, Yu Cao, Jae Sun Seo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

This paper presents an object detection accelerator that features many-scale (17), many-object (up to 50), multi-class (e.g., face, traffic sign), and high accuracy (average precision (AP) of 0.81/0.72 for AFW/BTSD datasets) detection. Employing 10 gradient/color channels, integral features are extracted and 2,000 simple classifiers for rigid boosted templates are adaptively combined to make a strong classification. The prototype chip implemented in 65nm CMOS demonstrates 16-40 frames per second and 22-160 mW power at 0.6-1.0V supply.

Original language	English (US)
Title of host publication	2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	21-22
Number of pages	2
ISBN (Electronic)	9781509015580
DOIs	https://doi.org/10.1109/ASPDAC.2017.7858282
State	Published - Feb 16 2017
Externally published	Yes
Event	22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017 - Chiba, Japan Duration: Jan 16 2017 → Jan 19 2017

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017
Country/Territory	Japan
City	Chiba
Period	1/16/17 → 1/19/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Publisher link

10.1109/ASPDAC.2017.7858282

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Kim, M., Mohanty, A., Kadetotad, D., Suda, N., Wei, L., Saseendran, P., He, X., Cao, Y., & Seo, J. S. (2017). A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. In 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017 (pp. 21-22). Article 7858282 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2017.7858282

A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. / Kim, Minkyu; Mohanty, Abinash; Kadetotad, Deepak et al.
2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 21-22 7858282 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kim, M, Mohanty, A, Kadetotad, D, Suda, N, Wei, L, Saseendran, P, He, X, Cao, Y & Seo, JS 2017, A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. in 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017., 7858282, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, Institute of Electrical and Electronics Engineers Inc., pp. 21-22, 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, 1/16/17. https://doi.org/10.1109/ASPDAC.2017.7858282

Kim M, Mohanty A, Kadetotad D, Suda N, Wei L, Saseendran P et al. A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. In 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017. Institute of Electrical and Electronics Engineers Inc. 2017. p. 21-22. 7858282. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1109/ASPDAC.2017.7858282

Kim, Minkyu ; Mohanty, Abinash ; Kadetotad, Deepak et al. / A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 21-22 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

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abstract = "This paper presents an object detection accelerator that features many-scale (17), many-object (up to 50), multi-class (e.g., face, traffic sign), and high accuracy (average precision (AP) of 0.81/0.72 for AFW/BTSD datasets) detection. Employing 10 gradient/color channels, integral features are extracted and 2,000 simple classifiers for rigid boosted templates are adaptively combined to make a strong classification. The prototype chip implemented in 65nm CMOS demonstrates 16-40 frames per second and 22-160 mW power at 0.6-1.0V supply.",

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A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS

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