Abstract
An organization for a knowledge-based analog circuit synthesis tool is described. Analog circuit topologies are represented as a hierarchy of functional blocks; a planning mechanism is introduced to translate performance specifications between levels in this circuit hierarchy. A prototype implementation, OASYS, synthesizes sized transistor schematics for simple CMOS operational amplifiers from performance specifications and process parameters, and demonstrates the workability of the approach.
| Original language | English (US) |
|---|---|
| Title of host publication | Papers on 25 Years of Electronic Design Automation, DAC 1988 |
| Editors | A.R. Newton |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 609-616 |
| Number of pages | 8 |
| ISBN (Electronic) | 0897912675 |
| DOIs | |
| State | Published - Jun 1 1988 |
| Event | 1988 ACM Design Automation Conference, DAC 1988 - Anaheim, United States Duration: Jun 12 1988 → Jun 15 1988 |
Publication series
| Name | Proceedings - Design Automation Conference |
|---|---|
| Volume | Part F130197 |
| ISSN (Print) | 0738-100X |
Other
| Other | 1988 ACM Design Automation Conference, DAC 1988 |
|---|---|
| Country/Territory | United States |
| City | Anaheim |
| Period | 6/12/88 → 6/15/88 |
Bibliographical note
Publisher Copyright:© ACM.
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