This paper presents an adaptation of the Block Cyclic Reduction (BCR) algorithm for a multi-vector processor. The main bottleneck of BCR lies in the solution of linear systems whose coefficient matrix is the product of tridiagonal matrices. This bottleneck is handled by expressing the rational function corresponding to the inverse of this product as a sum of elementary fractions. As a result the solution of this system leads to parallel solutions of tridiagonal systems. Numerical experiments performed on an Alliant FX/8 are reported.
|Original language||English (US)|
|Title of host publication||Supercomputing - 1st International Conference, Proceedings|
|Editors||Theodore S. Papatheodorou, Constantine D. Polychronopoulos, Elias N. Houstis|
|Number of pages||13|
|State||Published - 1988|
|Event||1st International Conference on Supercomputing, 1987 - Athens, Greece|
Duration: Jun 8 1987 → Jun 12 1987
|Name||Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|
|Other||1st International Conference on Supercomputing, 1987|
|Period||6/8/87 → 6/12/87|
Bibliographical noteFunding Information:
This work was supported by the National Science Foundation under Grants No. US NSF DCR84-10110 and US NSF DCR85-'09970, the US Department of Energy under Grant No. DOE DE-FG02-85ER25001, by the US Air Force under Contract AFSOR-85-0211, and the IBM donation.