TY - GEN
T1 - A novel hardware-oriented decoding algorithm for non-binary LDPC codes
AU - Yang, Hong
AU - Yang, Qing Qing
AU - Fang, Yuanwei
AU - Zhou, Xiaofang
AU - Sobelman, Gerald E.
PY - 2012/12/1
Y1 - 2012/12/1
N2 - This paper presents a novel hardware-oriented decoding algorithm in the log-domain for non-binary LDPC codes over GF(2m). As for max-log-SPA, only summations and comparisons are required in this new algorithm. During the vertical update, these two operations are divided into layers based on the distribution of variable vectors that satisfy the check function. The number of additions during the vertical update is reduced by a factor of approximately p-2 without a performance loss, where p is the row weight of the parity check matrix.
AB - This paper presents a novel hardware-oriented decoding algorithm in the log-domain for non-binary LDPC codes over GF(2m). As for max-log-SPA, only summations and comparisons are required in this new algorithm. During the vertical update, these two operations are divided into layers based on the distribution of variable vectors that satisfy the check function. The number of additions during the vertical update is reduced by a factor of approximately p-2 without a performance loss, where p is the row weight of the parity check matrix.
UR - http://www.scopus.com/inward/record.url?scp=84874184842&partnerID=8YFLogxK
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U2 - 10.1109/APCCAS.2012.6419056
DO - 10.1109/APCCAS.2012.6419056
M3 - Conference contribution
AN - SCOPUS:84874184842
SN - 9781457717291
T3 - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
SP - 400
EP - 403
BT - 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
T2 - 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
Y2 - 2 December 2012 through 5 December 2012
ER -