A new reconfigurable bit-serial systolic divider for GF(2M) and GF(P)

Aaron E. Cohen, Keshab K. Parhi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

This paper focuses on the design of a new dual field divider that can achieve performance of 1/m throughput. This dual field division unit can operate at 118 MHz with a latency of 7m - 2 cycles and has an area requirement 15 XOR2, 40 AND2, 29 MUX2, and 7 INV gates per processing element with a total of 2m processing elements. It is intended to be used in an Elliptic Curve Crypto-Accelerator for GF(2m) and GF(p). The actual performance for scalar point multiplication in GF(2571) running at 100 MHz would be 20.4 kP/s. The actual performance for scalar point multiplication in GF(p) with |p| = 521 running at 100 MHz would be 24.4 kP/s.

Original languageEnglish (US)
Title of host publication2005 IEEE ICASSP '05 - Proc. - Design and Implementation of Signal Proces.Syst.,Indust. Technol. Track,Machine Learning for Signal Proces. Education, Spec. Sessions
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesV105-V108
ISBN (Print)0780388747, 9780780388741
DOIs
StatePublished - Jan 1 2005
Event2005 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '05 - Philadelphia, PA, United States
Duration: Mar 18 2005Mar 23 2005

Publication series

NameICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
VolumeV
ISSN (Print)1520-6149

Other

Other2005 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '05
CountryUnited States
CityPhiladelphia, PA
Period3/18/053/23/05

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    Cohen, A. E., & Parhi, K. K. (2005). A new reconfigurable bit-serial systolic divider for GF(2M) and GF(P). In 2005 IEEE ICASSP '05 - Proc. - Design and Implementation of Signal Proces.Syst.,Indust. Technol. Track,Machine Learning for Signal Proces. Education, Spec. Sessions (pp. V105-V108). [1416251] (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; Vol. V). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICASSP.2005.1416251