Traditional methodologies for analyzing electromigration (EM) in VLSI circuits first filter immortal wires using Blech's criterion, and then perform detailed EM analysis on the remaining wires. However, Blech's criterion was designed for two-terminal wires and does not extend to general structures. This paper demonstrates a first-principles-based solution technique for determining the steady-state stress at all the nodes of a general interconnect structure, and develops an immortality test whose complexity is linear in the number of edges of an interconnect structure. The proposed model is applied to a variety of structures. The method is shown to match well with results from numerical solvers, to be scalable to large structures.
|Original language||English (US)|
|Title of host publication||2021 58th ACM/IEEE Design Automation Conference, DAC 2021|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||6|
|State||Published - Dec 5 2021|
|Event||58th ACM/IEEE Design Automation Conference, DAC 2021 - San Francisco, United States|
Duration: Dec 5 2021 → Dec 9 2021
|Name||Proceedings - Design Automation Conference|
|Conference||58th ACM/IEEE Design Automation Conference, DAC 2021|
|Period||12/5/21 → 12/9/21|
Bibliographical noteFunding Information:
This work was supported in part by the NSF under award CCF-1714805, by the DARPA OpenROAD project, and the Louise Dosdall Fellowship.
© 2021 IEEE.