Abstract
Adiabatic Quantum-Flux-Parametron (AQFP) logic is an adiabatic superconductor logic that has been proposed as alternative to CMOS logic with extremely high energy efficiency. In AQFP technology, majority-based gates have the same area as two-input AND/OR gates while offering more complex logic. Therefore, majority-based logic (MAJ) is more preferred than and-or-inverter-based logic (AOI) to implement logic functions in AQFP for higher energy efficiency. In this paper, we propose a majority gates synthesis framework for AQFP circuits that is capable of converting any AOI netlist to its corresponding MAJ netlist by mapping all feasible three-input sub-netlists to corresponding MAJ based implementations. In addition, the proposed tool can insert the optimal amount of buffers and splitters for equivalent delay as required in the AQFP technology. Experimental results suggest that the proposed method can reduce delay and area by up to 60.00% and 60.98%, respectively.
Original language | English (US) |
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Title of host publication | GLSVLSI 2019 - Proceedings of the 2019 Great Lakes Symposium on VLSI |
Publisher | Association for Computing Machinery |
Pages | 189-194 |
Number of pages | 6 |
ISBN (Electronic) | 9781450362528 |
DOIs | |
State | Published - May 13 2019 |
Externally published | Yes |
Event | 29th Great Lakes Symposium on VLSI, GLSVLSI 2019 - Tysons Corner, United States Duration: May 9 2019 → May 11 2019 |
Publication series
Name | Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI |
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Conference
Conference | 29th Great Lakes Symposium on VLSI, GLSVLSI 2019 |
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Country/Territory | United States |
City | Tysons Corner |
Period | 5/9/19 → 5/11/19 |
Bibliographical note
Publisher Copyright:© 2019 ACM.
Keywords
- Aqfp
- Logic synthesis
- Majority gates
- Superconducting electronics