A low-power twiddle factor addressing architecture for split-radix FFT processor

Keyphrases

• Low Power 100%
• Twiddle Factor 100%
• FFT Processor 100%
• Split-radix FFT 100%
• Fast Fourier Transform 60%
• Split-radix 60%
• FFT Algorithm 40%
• Address Generator 40%
• Power Consumption 20%
• Low Power Consumption 20%
• Radix-2 20%
• FFT Architecture 20%
• Multiplication Operation 20%
• Pipelined Circuits 20%
• Post-layout Simulation 20%
• Single Delay Feedback 20%
• Memory Address 20%

Engineering

• Fast Fourier Transform 100%
• Address Generator 66%
• Electric Power Utilization 33%
• Design Point 33%
• Low Power Consumption 33%
• Feedback Delay 33%

Computer Science

• Fast Fourier Transform 100%
• Power Consumption 33%
• Memory Address 33%
• Multiplication Operation 33%
• radix 2 33%
• Low Power Consumption 33%