@inproceedings{ec70bbf2342a4f2ba40a5e9b3931b762,
title = "A low complexity floating-point complex multiplier with a three-term dot-product unit",
abstract = "In this paper, we propose a new design for a low complexity floating-point complex multiplier for DSP applications. The design uses a three-term dot-product unit that reduces the overlapped portion found in a previous two-term fused dot-product unit. Comparisons with a primitive fused adder-subtract unit, a dot-product unit and combinations of these primitive units have also been performed. The synthesis results using a 45-nm standard-cell library shows a 16% reduction in area and a 6% reduction in power consumption as compared to a previous complex multiplier using two fused dot-product units.",
keywords = "Floating-point complex multiplier, fused add-subtract, fused dot product, three-term fused dot product",
author = "Sangho Yun and Sobelman, {Gerald E.} and Xiaofang Zhou",
year = "2014",
month = dec,
day = "15",
doi = "10.1109/ICSPCC.2014.6986253",
language = "English (US)",
series = "2014 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "549--552",
booktitle = "2014 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2014",
note = "2014 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2014 ; Conference date: 05-08-2014 Through 08-08-2014",
}