A low-complexity FFT Processor using two-dimensional algebraic integer encoding

Sangho Yun; Fan Wu; Gerald E. Sobelman; Xiaofang Zhou

doi:10.1109/ICSICT.2016.7999028

A low-complexity FFT Processor using two-dimensional algebraic integer encoding

Sangho Yun
, Fan Wu
, Gerald E. Sobelman
, Xiaofang Zhou

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Scopus citations

Abstract

An efficient architecture of a 64-point FFT processor using two-dimensional algebraic integer (AI) encoding is presented. The advantage of two-dimensional AI encoding is that the hardware complexity for multiplication is reduced since a multiplication can be replaced by a few simple shifts and additions. The ROMless FFT processor, which replaces the ROM for twiddle factors with a twiddle factor generator (TFG) using 2-D AI encoding, has less hardware complexity than previous implementations. The proposed architecture uses a wordlength of 14 bits to achieve an acceptable SNR. It has been synthesized onto an FPGA, and comparative resource utilization results are presented.

Original language	English (US)
Title of host publication	2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
Editors	Ru Huang, Ting-Ao Tang, Yu-Long Jiang
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	737-740
Number of pages	4
ISBN (Electronic)	9781467397179
DOIs	https://doi.org/10.1109/ICSICT.2016.7999028
State	Published - 2016
Event	13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Hangzhou, China Duration: Oct 25 2016 → Oct 28 2016

Publication series

Name	2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings

Other

Other	13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016
Country/Territory	China
City	Hangzhou
Period	10/25/16 → 10/28/16

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

AIQ
FFT/IFFT
OFDM
WLAN

Publisher link

10.1109/ICSICT.2016.7999028

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Yun, S., Wu, F., Sobelman, G. E., & Zhou, X. (2016). A low-complexity FFT Processor using two-dimensional algebraic integer encoding. In R. Huang, T.-A. Tang, & Y.-L. Jiang (Eds.), 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings (pp. 737-740). Article 7999028 (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSICT.2016.7999028

A low-complexity FFT Processor using two-dimensional algebraic integer encoding. / Yun, Sangho; Wu, Fan; Sobelman, Gerald E. et al.
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings. ed. / Ru Huang; Ting-Ao Tang; Yu-Long Jiang. Institute of Electrical and Electronics Engineers Inc., 2016. p. 737-740 7999028 (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yun, S, Wu, F, Sobelman, GE & Zhou, X 2016, A low-complexity FFT Processor using two-dimensional algebraic integer encoding. in R Huang, T-A Tang & Y-L Jiang (eds), 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings., 7999028, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 737-740, 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016, Hangzhou, China, 10/25/16. https://doi.org/10.1109/ICSICT.2016.7999028

Yun S, Wu F, Sobelman GE, Zhou X. A low-complexity FFT Processor using two-dimensional algebraic integer encoding. In Huang R, Tang TA, Jiang YL, editors, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2016. p. 737-740. 7999028. (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings). doi: 10.1109/ICSICT.2016.7999028

Yun, Sangho ; Wu, Fan ; Sobelman, Gerald E. et al. / A low-complexity FFT Processor using two-dimensional algebraic integer encoding. 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings. editor / Ru Huang ; Ting-Ao Tang ; Yu-Long Jiang. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 737-740 (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings).

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abstract = "An efficient architecture of a 64-point FFT processor using two-dimensional algebraic integer (AI) encoding is presented. The advantage of two-dimensional AI encoding is that the hardware complexity for multiplication is reduced since a multiplication can be replaced by a few simple shifts and additions. The ROMless FFT processor, which replaces the ROM for twiddle factors with a twiddle factor generator (TFG) using 2-D AI encoding, has less hardware complexity than previous implementations. The proposed architecture uses a wordlength of 14 bits to achieve an acceptable SNR. It has been synthesized onto an FPGA, and comparative resource utilization results are presented.",

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A low-complexity FFT Processor using two-dimensional algebraic integer encoding

Abstract

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Keywords

Publisher link

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