A holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced stress considerations

Keyphrases

• 3D IC 100%
• Time Variation 100%
• Induced Stress 100%
• Temperature Effect 50%
• Stress Effect 50%
• Induced Variation 50%
• Thermal Stress 50%
• Thermally Induced 50%
• Analytical Model 50%
• Biaxial 50%
• Holistically 50%
• Semi-analytic 50%
• Piezoresistive Effect 50%
• TSV Stress 50%
• Transistor 50%
• Transistor Parameter 50%

Engineering

• Induced Stress 100%
• Timing Circuits 100%
• Transistor 100%
• Thermal Residual Stress 50%
• Analytical Model 50%