TY - GEN
T1 - A high-density subthreshold SRAM with data-independent bitline leakage and virtual ground replica scheme
AU - Kim, Tae Hyoung
AU - Liu, Jason
AU - Keane, John
AU - Kim, Chris H.
PY - 2007
Y1 - 2007
N2 - A 10T SRAM cell with data-independent bitline leakage and a virtual-ground replica scheme allows 1k cells per bitline in subthreshold SRAMs. Reverse short-channel effect is used to improve writability, offer higher speed, reduce junction capacitance, and decrease circuit variability. A 0.13μm, the 480kb SRAM test chip shows a minimum operating voltage of 0.20V.
AB - A 10T SRAM cell with data-independent bitline leakage and a virtual-ground replica scheme allows 1k cells per bitline in subthreshold SRAMs. Reverse short-channel effect is used to improve writability, offer higher speed, reduce junction capacitance, and decrease circuit variability. A 0.13μm, the 480kb SRAM test chip shows a minimum operating voltage of 0.20V.
UR - http://www.scopus.com/inward/record.url?scp=34548813602&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34548813602&partnerID=8YFLogxK
U2 - 10.1109/ISSCC.2007.373428
DO - 10.1109/ISSCC.2007.373428
M3 - Conference contribution
AN - SCOPUS:34548813602
SN - 1424408539
SN - 9781424408535
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 330
EP - 332
BT - 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 54th IEEE International Solid-State Circuits Conference, ISSCC 2007
Y2 - 11 February 2007 through 15 February 2007
ER -