A general approach for identifying hierarchical symmetry constraints for analog circuit layout

Kishor Kunal, Jitesh Poojary, Tonmoy Dhar, Meghna Madhusudan, Ramesh Harjani, Sachin S. Sapatnekar

Research output: Contribution to journalConference articlepeer-review

2 Scopus citations

Fingerprint

Dive into the research topics of 'A general approach for identifying hierarchical symmetry constraints for analog circuit layout'. Together they form a unique fingerprint.

Engineering & Materials Science